Selective Layer Transfer: Industry First Heterogeneous Integration Technology Enabling Ultra-Fast Assembly & Sub-1um Chiplet Thickness for Next Generation AI & Compute Applications

Author: Liff, Shawna ; Yaghoobi, Mohammadreza ; Nordeen, Paul ; Elsherbini, Adel ; Antonana, Marta Anguera ; Bedoya, Felipe ; Vyatskikh, Andrey ; Barnett, Herbert ; Vreeland, Richard ; Talukdar, Tushar ; Sounart, Thomas ; Yu, Qiang ; Pawashe, Chytra ; Brezinski, William ; Kloster, Grant ; Dogiamis, Georgios ; Rawlings, Brandon ; Swan, Johanna ; Eid, Feras

03 Dec 2022·2022 International Electron Devices Meeting (IEDM)

Enabling Next Generation 3D Heterogeneous Integration Architectures on Intel Process

Author: Woods, C. ; Tiagaraj, S. ; Goel, M. ; Tsunoda, N. ; Swan, J. ; Torres, J. ; Yin, G. ; Li, W. ; Shi, Y. ; Liff, S. ; Vreeland, R. ; Ajayi, T. ; Kabir, E. ; Bielefeld, J. ; Talukdar, T. ; Elsherbini, A. ; Krisnatreya, B. ; Jordan, R. ; Fischer, P. ; Rawlings, B. ; Zhang, B. ; Ng, J. ; Qian, Z. ; Pasdast, G. ; Jun, K. ; Liu, P. ; Pelto, C. ; Brun, X. ; Niazi, H. ; Brezinski, W. ; Hoff, T.

12 Dec 2020·2020 IEEE International Electron Devices Meeting (IEDM)

Advances in Research on 300mm Gallium Nitride-on-Si(111) NMOS Transistor and Silicon CMOS Integration

Author: H. Vora ; N. Thomas ; P. Wallace ; M. Qayyum ; M. Weiss ; N. Minutillo ; N. Desai ; V. Hadagali ; Han Wui Then ; P. Fischer ; T. Talukdar ; J. Rode ; K. Jun ; J. Sandford ; R. Kotlyar ; P. Koirala ; R. Ehlert ; X. Weng ; M. Radosavljevic ; A. Oni

We discuss advances in our research on 300mm GaN NMOS by demonstrating GaN-on-Si(111) NMOS transistors achieving low R ON =330Ω-μm; high ID,max=1.7mA/μm; BV DS (at I D =1μA/μm) of up to 90V with excellent R ON =660Ω-μm; record f T /f MAX of 200/350GHz for GaN-on-Si; industry’s best RF switch R on C off =55fs; and highest mmwave (28GHz) RF power amplifier peak PAE of 65% @ 19.5dBm saturated power. We discuss and compare the challenges in approaches to GaN and Si CMOS integration research including: (a) poly-silicon CMOS, (b) heterogeneous epitaxy of GaN and Si(111) CMOS, (c) wafer-to-wafer bonding [2], and (d) 3D monolithic Si(100) layer transfer using bonding techniques [1],[3].

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